[A83] Re: LD A,R ; LD R,A

To: assembly-83@lists.ticalc.org
Subject: [A83] Re: LD A,R ; LD R,A
From: Martin Virt <martin.virt@gmx.at>
Date: Sat, 14 Jul 2001 23:36:21 +0200
In-Reply-To: <0d11f4140180e71NET013S@hetnet.nl>
Reply-To: assembly-83@lists.ticalc.org



>The last thing told here doesn't apply to the Ti's, they only have stactic
>RAM.
>
>I don't really understand in what way the R register is usefull for dynamic
>memories (nor what dynamic memories exactly are).


Here's a short explanation of SRAM:
http://burks.brighton.ac.uk/burks/foldoc/24/109.htm

A guide to the various types of DRAM:
http://www6.tomshardware.com/mainboard/98q4/981024/index.html

So DRAM is cheaper, which back in the 70's and 80's might have made all the 
difference, when memory cost was so high that most home computers had at 
most 64kb; think of the ZX81 (1kb), the Spectrum (first had 16kb) and the 
VIC20 (3.5kb).
A built-in refresh register made sense back then, even if it is not used 
nowadays on TI-calcs.
I'm not sure about the following, but this might have been the main reason 
for SRAM on TI's calcs: DRAMs need a steady supply of electrical charges to 
keep information and that drains the batteries.

MaV

Follow-Ups:

[A83] Re: LD A,R ; LD R,A

From: Gavin Olson <gtolson@snet.net>

References:

[A83] Re: LD A,R ; LD R,A

From: "Henk Poley" <HPoley@DDS.nl>