[TI-H] Re: TI-89 HW2 overclocking
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[TI-H] Re: TI-89 HW2 overclocking
B.A. Baracus wrote:
> Sorry, I seem to have generated some confusion by talking about both HW1
> and HW2 hardware.
>
> On Mon, 24 Feb 2003 14:09:52 +0100, Olle Hedman <alh@home.se> wrote:
>
>> Yes, you can see it as that. The minimum number of cycles per
>> instruction is 4, so only each 4th cycle could generate bus activity.
>
>
> Is this true of both HW1&2?
That is 68000 specific, and both HW1 and HW2 has a 68000, so yes.
>
> This part seems to be a bit muddled to me (perhaps because I don't have
> much experience with SRAMs/microprocessors). I gather that, for some
> reason,
> the CPU tries to write _bytes_ too quickly at more than 15MHz (or
> 20MHz?).
>
> Now, I'm looking at the datasheet for the Toshiba 55V1001A SRAM chip for
> the HW2 (http://www.toshiba.com/taec/components/Datasheet/V1001a.pdf).
>
> I don't see anything called Chip Select, however, under Write Cycle, I
> see
> the following:
>
> Write Cycle Time min 85ns
> Write Pulse Width min 60ns
> Chip Enable to End of Write min 75ns
>
> Is one of these the relevant value that is being exceeded by the
> calculator
> that is preventing overclocking beyond 15~20MHz?
Chip Select, Chip Enable, same thing different name. From the chips
point of view it gets "enabled" from the cpus point of view it "selects"
the chip (by enabling it)
The lower value should be the relevant. Maybe in conjuction with the
second. I'm not sure here though.
about the 15MHz it is the highest Johan recommends for a stable calc.
~20MHz and it becomes unreliable.
Maybe that answers your confusion.
--Olle
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