Re: TI-H: fargo fterm

Subject: Re: TI-H: fargo fterm
From: Isaac Salpeter <isaac@ticalc.org>
Date: Fri, 15 Nov 1996 18:11:25 -0500 (EST)
In-Reply-To: <2.2.16.19961115225439.42ff6c34@mage.qualcomm.com>

On Fri, 15 Nov 1996, Marty Williams wrote:


> >The internal ROM routines on the 85 (and probably the 92, given that it
> >uses the same GRAPH-LINK cable and CBL as the 8x series calculators) use
> >one line for DATA and the other line for ACK (which is which depends on
> >the bit currently being sent). 
> 
> Well that's close.  Both lines are used to send and receive data.  The 'W'
[snip]
> release both lines to high again.


That's what I said - which line acts as data and which as ACK depends on
the state of the bit being sent.


> It's synchronous though because,  the sender places a bit out there to be
> read by the receiver and has to waits for it to be acked before it can send
> the next bit.  The protocol is synchronous because, the sender is held in
> time to the receivers ability to read the bits.


Fair enough. A bit of a stretch, but I'll go with that. Anyhow that's not
what's important. :)


-Isaac


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--
Isaac Salpeter
the ticalc.org project
isaac@ticalc.org
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References:

Re: TI-H: fargo fterm

From: Marty Williams <mwilliams@qualcomm.com>