LZ: The Ram Expander -- Update.

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LZ: The Ram Expander -- Update.

Well, I was deep into writing the software for the expander when I saw
a (big) error.  While designing the circuit, for some reason I assumed
that when you want to read from the link port, you output a "0" to it
and then do a IN A, (7).  Now, that may work, but that's not how the
link port was designed.  You're supposed to output a $C0 at the end of
a transmission, meaning that the device connected to the link port
must pull the line *low*, not pull it high.  I'm not sure exactly how
this will work, but I'm goina do some testing on it to see what
registers (i.e. will it read TTL logic states, or is CMOS necessary).
The chip itself cannot allow a simultaneous 1 on the DI and the DO
lines, so the DI line will have to be inverted (I'll explain in more
detail once I fix the error). =20


I have also found a way to build this using only 2 simpler logic chips
instead of 3.  All these circuit modifications will be posted within a
few days.


-Mel


<pre>
--
The TI-85 Memory Expantion Homepage
http://pilot.msu.edu/user/tsaimelv/expander.htm
</pre>