[A83] Re: LD A,R ; LD R,A
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[A83] Re: LD A,R ; LD R,A
Dyamic memories must be updated or they lose their information. I believe
standard PC memory is dynamic, requiring refresh cycles.
Michael Vincent
Detached Solutions - www.detacheds.com
Radical Software - www.radicalsoft.org
----- Original Message -----
From: "Henk Poley" <HPoley@DDS.nl>
To: <assembly-83@lists.ticalc.org>
Sent: Saturday, July 14, 2001 10:53 AM
Subject: [A83] Re: LD A,R ; LD R,A
>
> > Van: Peter-Martijn Kuipers <hyper@hysoft-automation.com>
> >
> > Does this mean that the R register can be freely used, or are there
> > other less obvious uses for?
>
> From AsmGuru (found the same info also on other places):
>
> <<Q-1: I AND R REGISTERS. What they do.
>
> I is the Interrupt page address register [..]
>
> R is the memory Refresh register. The Z-80 CPU contains a memory refresh
> counter to enable dynamic memories to be used with the same ease as static
> memories. Seven bits of this 8 bit register are automatically incremented
> after each instruction fetch. The eight bits will remain as programmed
with
> the LD R,A instruction.>>
>
> So you can use the R register to 'store' something, but only if that's one
> bit...
>
> <<The data in the refresh counter is sent out on the lower portion of the
> address bus along with a refresh control signal while the CPU is decoding
> and executing the instruction. The programmer can load the R register for
> testing purposes, but this register is normally NOT used by the
programmer.
> During refresh, the contents of the I register are placed on the upper 8
> bits of the address bus.>>
>
> The last thing told here doesn't apply to the Ti's, they only have stactic
> RAM.
>
> I don't really understand in what way the R register is usefull for
dynamic
> memories (nor what dynamic memories exactly are).
>
> Henk Poley
>
>
>
>
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