Re: Re(fcc): TI-H: Radio/Infrared/Laser Communications
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Re: Re(fcc): TI-H: Radio/Infrared/Laser Communications
"Omygosh" how wrong you are.
> Ok.. Now I don't know what has been said about this as I haven't read
>that far in the E-mail. But when I read this I just had to reply. Anyone
>can program Toll Booths? And by what facts do you base this information?
>Are you a programmer? A good one? Do you relize how hard it is to get code
>small enough and stable enough to do a task repeatedly without fail?
It is hard. And its also hard to make an mp3 player that gets a byte,
processes it, and send it 16,000 times a second without fail.
>Do you
>know how hard it is implementing one piece of hardware to software?
Easy.
>And,
>(sorry grant no offense here) grant's MP3 player isn't all that special.
>The heart of it is the MAS. Something which he didn't design.
I designed a whole lot more of it than anyone else you messed up person.
I've been working with Micronas for a long time prototyping their chip. I
would test each new firmware chip and figure out the best values for the
parts.
>Only
>implemented.
Ummm... :) No. I've signed an NDA, so nothing too confidential, But I
can say that I have the source code for the chip and know which chipset and
code the Rio uses. :)
>He just found the pieces and put them together in the right
>order.
The only part I remotely "found and put together" was the mas. The 8255,
8515, ect were all protoed solely by me.
>The hard part will be interfacing IDE. Which isn't done yet.
WTF! You don't know a thing about me! Fag!
;(Parts left out due to NDA)
;Goal: Recode this code so that it doesn't violate my NDA.
;Property of Micronas Intermetal (I gave it to them)
;###########################################################
;#
;# ACPlay IDE Driver
;# Version .x Release .x Save .x Build .x
;#
;###########################################################
.def cylh =r30
.def cyll =r31
.def sector =r17
.def head =r16
.def count =r20
.def highb =r27
.def lowb =26
;***************************************************************************
;*
;* "SendIDE"
;*
;* This subroutine transmits the word/byte stored in the "X" register
;*
;*
;* Number of words :
;* Number of cycles :
;* Low registers used :1 (r26)
;* High registers used :1 (r27)
;* Pointers used :
;*
;***************************************************************************
SendIDE: rcall SENDADR1 ;CS0-1, DA0-2
cbi PORTC, 4 ;DIOW
out PORTA, highb ;MSB
out PORTB, lowb ;LSB
sbi PORTC, 4 ;DIOW
cbi PORTC, 4 ;DIOW
sbi PORTC, 4 ;DIOW
ret
;***************************************************************************
;*
;* "ReceiveIDE"
;*
;* This subroutine receives a byte/word from the IDE hard drive
;*
;*
;* Number of words :
;* Number of cycles :
;* Low registers used :1 (r26)
;* High registers used :1 (r27)
;* Pointers used :
;*
;***************************************************************************
ReceiveIDE: rcall SENDADR1 ;CS0-1, DA0-2
cbi PORTC, 5 ;DIOR
in highb, PORTA ;MSB
in lowb, PORTB ;LSB
sbi PORTC, 5 ;DIOR
cbi PORTC, 5 ;DIOR
sbi PORTC, 5 ;DIOR
ret
;***************************************************************************
;*
;* "SendCSH"
;*
;* This subroutine transmits the Sector Count, Sector Number, Cylinder, and
;* Head/Drive to the IDE hard drive
;*
;* Number of words :
;* Number of cycles :
;* Low registers used :1 (r26)
;* High registers used :1 (r27)
;* Pointers used :
;*
;***************************************************************************
SendCSH: sbr ADRa, 0b00010100 ;Send Sector Count
%11010100
ldi lowb, 1
rcall SendIDE
sbr ADRa, 0b00000010 ;Sector Number
%11010110
mov lowb, sector
rcall SendIDE
ldi ADRa, 0b11011000 ;Cylinder Low Register
%11011000
mov lowb, cyll
rcall SendIDE
sbr ADRa, 0b00000010 ;Cylinder High Register
%11011010
mov lowb, cylh
rcall SendIDE
ldi ADRa, 0b11011100 ;Drive/Head Register
%11011100
mov lowb, head
rcall SendIDE
ldi ADRa, 0b11000000
;***************************************************************************
;*
;* "WaitIDE"
;*
;* This subroutine waits for the IDE hard drive to be ready.
;*
;*
;* Number of words :
;* Number of cycles :
;* Low registers used :
;* High registers used :
;* Pointers used :
;*
;***************************************************************************
WaitIDE: ldi ADRa, 0b11011110 ;Status Register
%%11011110
WaitIDE2: rcall ReceiveIDE
com lowb
brcc WaitIDE2
ldi ADRa, 0b11000000
ret
>The
>part that is done isn't much at all.. A DAC and the MAS and something to
>get the data to the MAS.
Sorry, but thats abotu all I can give you right now. If you want to insult
yourself some more, e-mail me priviately.
The ONLY people who have a working IDE player are Jim (Micronas rep in
California) and Marc in germany.
I guess this is what I get for posting my plans. Uninformed people such as
"Pellaeon" think they know it all and don't know the back of their hand...
>Your way outta line here.
I can't beleive how wrong you are. :)
Final version here:
;6269 clock cycles
;.783625msec
;783.625usec
;783,625nsec
RecSec: cli ;1
clr r28 ;1
clr r29 ;1
rcall SendCSH ;3+895
ldi ADRa, 0b11101110 ;1
ldi lowb, $20 ;1
rcall SendIDE ;3+155
widint: sbic PORTD, HDInt ;2
rjmp cont ;2
rjmp widint ;2
cont: rcall ReadIDE ;3+155
ldi count, 255 ;1
ldi ADRa, 0b11100000 ;1
rcall SendADR1 ;3+155 158
idrd: sbi PORTC, DIOR ;2*255 510
nop ;1*255 255
cbi PORTC, DIOR ;2*255 510
nop ;1*255 255
in highb, PORTA ;1*255 255
in lowb, PORTB ;1*255 255
sbi PORTC, DIOR ;2*255 510
cbi PORTC, DIOR ;2*255 510
st Y+, r26 ;2*255 510
st Y+, r27 ;2*255 510
dec count ;1*255 255
brne idrd ;2*255-1 509
ret ;4
;6269 clock cycles
;.783625msec
;783.625usec
;783,625nsec
SenSec: cli ;1
clr r28 ;1
clr r29 ;1
rcall SendCSH ;895+3
ldi ADRa, 0b11101110 ;1
ldi lowb, $30 ;1
rcall SendIDE ;173+3
ridint: sbic PORTC, HDInt ;2
rjmp conta ;2
rjmp ridint ;2
conta: rcall ReadIDE ;173+3
ldi count, 255 ;1
ldi ADRa, 0b11100000 ;1
rcall SendADR1 ;3+155 158
idwd: ld highb, Y+ ;1*255 255
ld lowb, Y+ ;1*255 255
sbi PORTC, DIOW ;2*255 510
nop ;1*255 255
cbi PORTC, DIOW ;2*255 510
nop ;1*255 255
out PORTA, highb ;1*255 255
out PORTB, lowb ;1*255 255
sbi PORTC, DIOW ;2*255 510
cbi PORTC, DIOW ;2*255 510
dec count ;1*255 255
brne idwd ;2*255-1 509
ret
;173 clock cycles
;.021625msec
;21.625usec
;21,625nsec
SendIDE: sbi PORTC, DIOW ;DIOW high ;2
rcall SENDADR1 ;CS0-1, DA0-2 ;3+155 158
cbi PORTC, DIOW ;DIOW low ;2
nop ;1
out PORTA, highb ;MSB ;1
out PORTB, lowb ;LSB ;1
sbi PORTC, DIOW ;DIOW high ;2
cbi PORTC, DIOW ;DIOW low ;2
ret ;4
;173 clock cycles
;.021625msec
;21.625usec
;21,625nsec
ReadIDE: sbi PORTC, DIOR ;DIOR high ;2
rcall SENDADR1 ;CS0-1, DA0-2 ;3+155 158
cbi PORTC, DIOR ;DIOR ;2
nop ;1
in highb, PORTA ;MSB ;1
in lowb, PORTB ;LSB ;1
sbi PORTC, DIOR ;DIOR high ;2
cbi PORTC, 5 ;DIOR low ;2
ret ;4
;895 clock cycles
;.111875msec
;111.875usec
;111,875nsec
SendCSH: ldi ADRa, 0b11010100 ;Send Sector Count
%11010100 ;1
ldi lowb, 1
;1
rcall SendIDE
;3+173
sbr ADRa, 0b11010110 ;Sector Number
%11010110 ;1
mov lowb, sector
;1
rcall SendIDE
;3+173
ldi ADRa, 0b11011000 ;Cylinder Low Register
%11011000 ;1
mov lowb, cyll
;1
rcall SendIDE
;3+173
ldi ADRa, 0b11011010 ;Cylinder High Register
%11011010 ;1
mov lowb, cylh
;1
rcall SendIDE
;3+173
ldi ADRa, 0b11011100 ;Drive/Head Register
%11011100 ;1
mov lowb, head
;1
rcall SendIDE
;3+173
ldi ADRa, 0b11000000
;1
ret
;4
References: