RE: TI-H: direct bus access

To: ti-hardware@lists.ticalc.org
Subject: RE: TI-H: direct bus access
From: gussie@alaska.net (Grant Stockly)
Date: Mon, 19 Jan 1998 22:12:45 -0700
Reply-To: ti-hardware@lists.ticalc.org


But why do that when the calc is meant to do up to 16?  The Classic, SE,
Plus, 512, 128, and some other macs all had a max of at least 4 (8086
comparable)

Unless you mean switching the banks with the link port, or unused processor
outs with a TSR?  how do you plan to switch the banks?

>EMS, the enhanced memory spec back in the XT days...
>It used 64K pages to switch banks of extra RAM.  Reduce that to say, 16K
>or 8K pages, and you're set.  actually, address it by 16-bit values.  64K
>is available, and then implement a method of switching pages.  It's slow,
>but can allow you to have a lot more space, provided you can find a place
>to stash the RAM chips.
>Christopher Kalos
>raptorone@stuytech.com
>Executive Director/Administrator
>Virtual Technologies Developer's Group
>
>
>----------
>From:   Christopher Lambert[SMTP:clambert@sparcy.geneva.edu]
>Sent:   Monday, January 19, 1998 9:56 PM
>To:     ti-hardware@lists.ticalc.org
>Subject:        TI-H: direct bus access
>
>
>
>Would anyone care if I told you that I have achieved direct bus access to
>a TI 92?  This has enabeled me to create external memory-mapped I/O
>ports.  Is this a good thing or does anyone even care?
>
>Chris Lambert
>clambert@geneva.edu
>calan@hotmail.com
>URL: www.geocities.com/siliconvalley/peaks/6869
>
>Content-Type: application/ms-tnef
>
>Attachment converted: Macintosh HD:RE- TI-H- direct bus access (????/----)
>(0000FF82)

---
Grant Stockly
AppleCyber - http://www.alaska.net/~gussie

Follow-Ups:

RE: TI-H: direct bus access

From: Christopher Lambert <clambert@sparcy.geneva.edu>