Re: A92: Recovering from Crashes on the 92+
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Re: A92: Recovering from Crashes on the 92+
Niklas Brunlid schrieb:
>
> >>
> >> Data in the Archive can't be accessed directly, it has to be copied into
> >> the real RAM before you can use it. The 92+ has the processor set up to
> >> access 256Kb of RAM, and must therefore use I/O ports to read
> from/write to
> >> the archive. Someone please prove me wrong on this one ;-)
> >>
> >
> >The 92 processor is a 68000 processor. It has thus an adressable space of 16
> >Mb ...
>
> Yes, provided that all the adress lines are connected... I believe the 92 was
> only intended to have 256Kb or RAM from the beginning, and therefore only
> 18 of
> the 24 (?) lines are wired.
>
> >I don' t know if this is what you meant but i think that the external flash
> >module is simply built in the adressable space.. I may be wrong as i have no
> >92+ module..
>
> Why if the 92 could adress all the memory on the Plus would TI implement
> such a
> strange solution like the "Archive memory"? It serves no useful purpose since
> it's erased along with the rest of the memory, and "archiving" a variable
> is no
> better than to lock it.
>
>
> Niklas Brunlid - http://www.efd.lth.se/~e96nbr
> PQF Quote follows:
>
> The trouble with being a god is that you've got no one to pray to.
> -- (Terry Pratchett, Small Gods)
>
You're right, 18 wires would be enough, but aren't RAM and ROM addressed in the
same way? On the plus I am able to read memory from $0 to $6xxxxx in one
thread (check with my disassembler/monitor that I posted yesterday,August 27th).
Maybe I'm wrong, I don't know enough about hardware aspects like that, but I
think if only 18 lines were connected they had to implement a bank switching
system or a multiplexer which would have slowed down the system... the 92+ is
faster than the 92. So my suggestion: the internal RAM is connected via 18
lines(or so), the module has a wider range, a suppose all 24 lines are
connected. A.K.
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