Re: A89: dumb question

To: assembly-89@lists.ticalc.org
Subject: Re: A89: dumb question
From: Zoltan Kocsi <zoltan@bendor.com.au>
Date: Sat, 19 Jun 1999 22:24:41 +1000 (EST)
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 > i don't think "clr.x" has anything to do with even/odd addresses at all...if 
 > i'm not mistaken i believe you are mistaken...

Well, on the 68K family accessing a word or longword object that does
not start on an even address causes an address error except on the 68020
and 68030, although in case of opcode fetches they will still cause
the named error, despite that fact that the bus engine could actually
split the access into partial object fetches. Even more interestingly, 
the 68008 (which has a single byte data bus thus could in theory access
anything on byte boundaries) does still throw the same address exception 
on misaligned accesses. The following table summarizes the access 
requirements for integral data types on different 68k family members:

       68000 
       68008  68020        CPU32
       68010  68030  68040 CPU32+

Insn   word   word   word  word
Byte   byte   byte   byte  byte
Word   word   byte*  word  word#
Long   word   byte*  long  word#
Quad    -     byte*  long  word#
B16     -      -     b16    -

* although the '020 and the '030 support multiple cycle misaligned 
  accesses, not aligning data to the actual bus width will incurr 
  performance penalty therefore is not recommended
   
# The restriction applies even if the actual object lays in a 8-bit
  bus width area

[I don't have the 68060 databook and never worked with the chip, so I
can't comment on that one.]

Now,

  clr.x   <ea>

does write a 0 into the object that is x wide and can be found at
effective address <ea>. Which, of course, is either an odd or an even
address. Therefore, 

  clr.w   1 

will give you an address error. In fact

  ???.w   1

will give you an address error.

Try to look up a 68k manual (you can download it from Motorola's
website in PDF) or they send you the databook for free (you can order
it on the website, too) and see what causes address errors on
different versions within the 68k family.

 > i think but am not sure that the only time you have to worry about odd 
 > address is if you may be writing to one...then you will get that big red 
 > error you were refering to =)

Well, while it is not true (you get the exception when you misalign a
read too), if you think about it, clear *does* actually write a word,
namely a 0 into it ...

In the 68000 microcode there's a well known bug, which is that the clr 
actually reads from <ea> before writing a 0 to it so if you mapped
some HW to <ea> that used access as a trigger, you could have two
trigger events in one instruction. They have fixed this bug in later
revisions, though. Regardless, clearing <ea> still means writing a 0 
to it.

Regards,

Zoltan

References:

Re: A89: dumb question

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