Re: A86: cphlde

Re: A86: cphlde

• To: assembly-86@lists.ticalc.org
• Subject: Re: A86: cphlde
• From: Dux Gregis <assets@eden.rutgers.edu>
• Date: Mon, 04 May 1998 20:14:33 -0400
• Delivered-To: assembly-86-outgoing@towerguard.unix.edu.sollentuna.se
• References: <Pine.LNX.3.95.980504132217.353D-100000@S-103-151.resnet.ohio-state.edu> <354E155E.ACF6890B@eden.rutgers.edu> <354E175B.1A419D49@ibm.net> <354E57CF.FDD0B4D0@eden.rutgers.edu>
• Reply-To: assembly-86@lists.ticalc.org

Sorry, I was wrong.  jp and ret can test the sign flag, jr cannot.

 and a
 jr z,a_is_zero
 jp p,a_is_positive
 jp m,a_is_negative

you can save a byte in inequalities by using the carry flag over using
the sign flag.

Dux Gregis wrote:
> 
> and a
>  jr z,a_is_zero
>  jr p,a_is_positve
>  jr m,a_is_negative
> 
> Bit 7 is copied into the sign flag and can be tested with the condition
> statements P and M.
> 
> Kirk Meyer wrote:
> >
> > yes, except that the carry flag can be used w/ the "jr" type
> > instructions whereas the sign flag cannot.
> >

• Re: A86: cphlde
• From: Dan Eble <eble@cis.ohio-state.edu>
• Re: A86: cphlde
• From: Dux Gregis <assets@eden.rutgers.edu>
• Re: A86: cphlde
• From: Kirk Meyer <_@ibm.net>
• Re: A86: cphlde
• From: Dux Gregis <assets@eden.rutgers.edu>

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