Re: LZ: Help with a routine
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Ryan Myers wrote:
>
> I need to know how to use the BIT opcode... the specific routine requires me
> to test the MSB (first bit) of a byte and branch if it is 1. Can someone
> please fill me in?
>
> My thanks,
> Ryan Myers ( rmyers@teleport.com )
> http://www.teleport.com/~rmyers/
> "Canthus" on DARKWORLD / Twisted Fate
>
> C> Warning: REALITY.SYS may be corrupt. Reboot universe(y/n)?
To use bit, do this:
bit 0, a
this tests bit zero of A, and sets the appropiate flags, sets Z if zero,
sets NZ if not zero.
I have seen lots of questions from beginning programmers about z80
assembly. To help this and further questions, I have included
tasmtabs.txt. This is all of the opcodes identified by TASM(the table
assembler). I use it for a good piece of reference. Even if you don't
use TASM, it's good to look at. Have fun.
<pre>
--
Compliments of:
_-_-_-_-_-_-_-_
Alan Bailey
mailto:bailala@mw.sisna.com
IRC:Abalone
Web:http://www.mw.sisna.com/users/bailala/home.htm
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Z80 INSTRUCTIONS AND ADDRESSING MODES
The following list shows the acceptable opcode mnemonics and their
corresponding operand formats for the Z80 version of TASM. The
following symbols are used in the table:
SYMBOLIC DESCRIPTION
-----------------------------------------------
<addr> Absolute address (16 bits)
<bit> Bit address
<data> Immediate data (8 bits)
<data16> Immediate data (16 bits)
<disp> Relative address
<reg> Register (A, B, C, D, E, H, or L)
<rp> Register pair (BC, DE, HL, or SP)
<port> Port (0 - 255)
<cond> Condition
NZ - not zero
Z - zero
NC - not carry
C - carry
PO - parity odd
PE - parity even
P - positive
M - minus
Any valid TASM expression can appear in the place of the <addr>,
<bit>, <data>, <data16>, or <disp> symbolics.
OPCODE OPERAND DESCRIPTION
--------------------------------------------------------------------
ADC A,<data> Add immediate with carry to accumulator
ADC A,<reg> Add register with carry to accumulator
ADC A,(HL) Add indirect memory with carry to accumulator
ADC A,(IX+<disp>) Add indirect memory with carry to accumulator
ADC A,(IY+<disp>) Add indirect memory with carry to accumulator
ADC HL,<rp> Add register pair with carry to HL
ADD A,<data> Add immediate to accumulator
ADD A,<reg> Add register to accumulator
ADD A,(HL) Add indirect memory to accumulator
ADD A,(IX+<disp>) Add indirect memory to accumulator
ADD A,(IY+<disp>) Add indirect memory to accumulator
ADD HL,<rp> Add register pair to HL
ADD IX,<rp> Add register pair to index register
ADD IY,<rp> Add register pair to index register
AND <data> And immediate with accumulator
AND <reg> And register with accumulator
AND (HL) And memory with accumulator
AND (IX+<disp>) And memory with accumulator
AND (IY+<disp>) And memory with accumulator
BIT <bit>,<reg> Test <bit> in register
BIT <bit>,(HL) Test <bit> in indirect memory
BIT <bit>,(IY+<disp>) Test <bit> in indirect memory
BIT <bit>,(IX+<disp>) Test <bit> in indirect memory
CALL <addr> Call the routine at <addr>
CALL <cond>,<addr> Call the routine if <cond> is satisfied
CCF Complement carry flag
CP <data> Compare immediate data with accumulator
CP <reg> Compare register with accumulator
CP (HL) Compare indirect memory with accumulator
CP (IX+<disp>) Compare indirect memory with accumulator
CP (IY+<disp>) Compare indirect memory with accumulator
CPD Compare accumulator with memory and
decrement address and byte counters
CPDR Compare accumulator with memory and
decrement address and byte counter,
continue until match is found or
byte counter is zero
CPI Compare accumulator with memory and
increment address and byte counters
CPIR Compare accumulator with memory and
increment address and byte counter,
continue until match is found or
byte counter is zero
CPL Complement the accumulator
DAA Decimal adjust accumulator
DEC <reg> Decrement register contents
DI Disable interrupts
DJNZ <disp> Decrement reg B and jump relative if zero
EI Enable interrupts
EX AF,AF' Exchange program status and alt program stat
EX DE,HL Exchange DE and HL contents
EX (SP),HL Exchange contents of HL and top of stack
EX (SP),IX Exchange contents of IX and top of stack
EX (SP),IY Exchange contents of IY and top of stack
EXX Exchange register pairs and alt reg pairs
HALT Program execution stops
IM 0 Interrupt mode 0
IM 1 Interrupt mode 1
IM 2 Interrupt mode 2
IN A,<port> Input port to accumulator
INC <reg> Increment contents of register
INC <rp> Increment contents of register pair
INC IX Increment IX
INC IY Increment IY
INC (HL) Increment indirect memory
INC (IX+<disp>) Increment indirect memory
INC (IY+<disp>) Increment indirect memory
IND Input to memory and decrement pointer
INDR Input to memory and decrement pointer until
byte counter is zero
INI Input to memory and increment pointer
INIR Input to memory and increment pointer until
byte counter is zero
IN <reg>,(C) Input to register
JP <addr> Jump to location
JP <cond>,<addr> Jump to location if condition satisifed
JP (HL) Jump to location pointed to by HL
JP (IX) Jump to location pointed to by IX
JP (IY) Jump to location pointed to by IY
JR <disp> Jump relative
JR C,<disp> Jump relative if carry is set
JR NC,<disp> Jump relative if carry bit is reset
JR NZ,<disp> Jump relative if zero flag is reset
JR Z,<disp> Jump relative if zero flag is set
LD A,I Move interrupt vector contents to accumulator
LD A,R Move refresh reg contents to accumulator
LD A,(<addr>) Load accumulator indirect from memory
LD A,(<rp>) Load accumulator indirect from memory by <rp>
LD <reg>,<reg> Load source register to destination register
LD <rp>,(<addr>) Load register pair indirect from memory
LD IX,(<addr>) Load IX indirect from memory
LD IY,(<addr>) Load IY indirect from memory
LD I,A Load interrup vector from accumulator
LD R,A Load refresh register from accumulator
LD <reg>,<data> Load register with immediate data
LD <rp>,<data16> Load register pair with immediate data
LD IX,<data16> Load IX with immediate data
LD IY,<data16> Load IY with immediate data
LD <reg>,(HL) Load register indirect from memory
LD <reg>,(IX+<disp>) Load register indirect from memory
LD <reg>,(IY+<disp>) Load register indirect from memory
LD SP,HL Load contents of HL to stack pointer
LD SP,IX Load contents of IX to stack pointer
LD SP,IY Load contents of IY to stack pointer
LD (addr),A Load contents of A to memory
LD (<addr>),HL Load contents of HL to memory
LD (<addr>),<rp> Load contents of register pair to memory
LD (<addr>),IX Load contents of IX to memory
LD (<addr>),IY Load contents of IY to memory
LD (HL),<data> Load immediate into indirect memory
LD (IX+<disp>),<data> Load immediate into indirect memory
LD (IY+<disp>),<data> Load immediate into indirect memory
LD (HL),<reg> Load register into indirect memory
LD (IX+<disp>),<reg> Load register into indirect memory
LD (IY+<disp>),<reg> Load register into indirect memory
LD (<rp>),A Load accumulator into indirect memory
LDD Transfer data between memory and decrement
destination and source addresses
LDDR Transfer data between memory until byte
counter is zero, decrement destintation
and source addresses
LDI Transfer data between memory and increment
destination and source addresses
LDIR Transfer data between memory until byte
counter is zero, increment destination
and source addresses
NEG Negate contents of accumulator
NOP No operation
OR <data> Or immediate with accumulator
OR <reg> Or register with accumulator
OR (HL) Or indirect memory with accumulator
OR (IX+<disp>) Or indirect memory with accumulator
OR (IY+<disp>) Or indirect memory with accumulator
OUT (C),<reg> Output from registor
OUTD Output from memory, decrement address
OTDR Output from memory, decrement address
continue until reg B is zero
OUTI Output from memory, increment address
OTIR Output from memory, increment address
continue until reg B is zero
OUT <port>,A Output from accumulator
POP <rp> Load register pair from top of stack
POP IX Load IX from top of stack
POP IY Load IY from top of stack
PUSH <rp> Store resister pair on top of stack
PUSH IX Store IX on top of stack
PUSH IY Store IY on top of stack
RES <bit>,<reg> Reset register bit
RES <bit>,(HL) Reset bit at indirect memory location
RES <bit>,(IX+disp) Reset bit at indirect memory location
RES <bit>,(IY+<disp>) Reset bit at indirect memory location
RET Return from subroutine
RET <cond> Return from subroutine if condition true
RETI Return from interrupt
RETN Return from non-maskable interrupt
RL <reg> Rotate left through carry register contents
RL (HL) Rotate left through carry indirect memory
RL (IX+<disp>) Rotate left through carry indirect memory
RL (IY+<disp>) Rotate left through carry indirect memory
RLA Rotate left through carry accumulator
RLC <reg> Rotate left branch carry register contents
RLC (HL) Rotate left branch carry indirect memory
RLC (IX+<disp>) Rotate left branch carry indirect memory
RLC (IY+<disp>) Rotate left branch carry indirect memory
RLCA Rotate left accumulator
RLD Rotate one BCD digit left between the
accumulator and memory
RR <reg> Rotate right through carry register contents
RR (HL) Rotate right through carry indirect memory
RR (IX+<disp>) Rotate right through carry indirect memory
RR (IY+<disp>) Rotate right through carry indirect memory
RRA Rotate right through carry accumulator
RRC <reg> Rotate right branch carry register contents
RRC (HL) Rotate right branch carry indirect memory
RRC (IX+<disp>) Rotate right branch carry indirect memory
RRC (IY+<disp>) Rotate right branch carry indirect memory
RRCA Rotate right branch carry accumulator
RRD Rotate one BCD digit right between the
accumulator and memory
RST Restart
SBC A,<data> Subtract data from A with borrow
SBC A,<reg> Subtract register from A with borrow
SBC A,(HL) Subtract indirect memory from A with borrow
SBC A,(IX+<disp>) Subtract indirect memory from A with borrow
SBC A,(IY+<disp>) Subtract indirect memory from A with borrow
SBC HL,<rp> Subtract register pair from HL with borrow
SCF Set carry flag
SET <bit>,<reg> Set register bit
SET <bit>,(HL) Set indirect memory bit
SET <bit>,(IX+<disp>) Set indirect memory bit
SET <bit>,(IY+<disp>) Set indirect memory bit
SLA <reg> Shift register left arithmetic
SLA (HL) Shift indirect memory left arithmetic
SLA (IX+<disp>) Shift indirect memory left arithmetic
SLA (IY+<disp>) Shift indirect memory left arithmetic
SRA <reg> Shift register right arithmetic
SRA (HL) Shift indirect memory right arithmetic
SRA (IX+<disp>) Shift indirect memory right arithmetic
SRA (IY+<disp>) Shift indirect memory right arithmetic
SRL <reg> Shift register right logical
SRL (HL) Shift indirect memory right logical
SRL (IX+<disp>) Shift indirect memory right logical
SRL (IY+<disp>) Shift indirect memory right logical
SUB <data> Subtract immediate from accumulator
SUB <reg> Subtract register from accumulator
SUB (HL) Subtract indirect memory from accumulator
SUB (IX+<disp>) Subtract indirect memory from accumulator
SUB (IY+<disp>) Subtract indirect memory from accumulator
XOR <data> Exclusive or immediate with accumulator
XOR <reg> Exclusive or register with accumulator
XOR (HL) Exclusive or indirect memory with accumulator
XOR (IX+<disp>) Exclusive or indirect memory with accumulator
XOR (IY+<disp>) Exclusive or indirect memory with accumulator
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</pre>
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