[A83] Re: calculator networking - good idea?
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[A83] Re: calculator networking - good idea?
well ... it's fairly easy... once you know the delay between each
"significant" state change (low to high, or high to low)... read the line
wait till it changes, got the first bit, wait 3/4 of the time, and read the
line until it changes, got the next bit, wait 3/4 of the delay, read the
line till it changes, got the next bit, and so on and on and on... :) not
very hard I would say...
that's to read it... on the sending side, not much harder...
line starts low ... (low when inactive)...
goes high, wait full delay, goes low, wait full delay, goes high.... till
preamble finshed...
change line for first bit, wait 1/2 delay, if next bit is same change the
line back, wait 1/2 delay, change line for next bit,....
eg of signal: (remember fixed width-fonts...)
significat changes (those that determine a bit) are marked with ^ and bit
value beneath it...
__|~~|__|~~|__|~|_|~~|__|~|_|~~|_|~|__|~~|__
^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^
1 0 1 0 1 1 0 1 1 0 0 1 0
-Nicolas Gilles
----- Original Message -----
From: "Henk Poley" <hpoley@dds.nl>
To: <assembly-83@lists.ticalc.org>
Sent: Saturday, February 08, 2003 18:30
Subject: [A83] Re: calculator networking - good idea?
> > Van: Nicolas Gilles <eee20154@port.ac.uk>
> >
> > [..]
> >
> > the delay needed to make the clocks synched is calculated (digital
> > phase lock)... and then you're done...
>
> Okay, now you "know" the delay. [supposing this works on a Ti83]
>
> And now?
>
> Henk Poley <><
>
>
> PS: Sorry to use this slightly harsh teaching method...
>
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