[A83] Re: Interrupt troubles [83, Ion]
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[A83] Re: Interrupt troubles [83, Ion]
To clarify: this deals about the 83- (not +)
(Although I think it's about the same on the 83+. You only have to change
port 03h by port 04h).
>From: "Henk Poley" <HPoley@DDS.nl>
>
> > Van: Kirk Meyer <kirk.meyer@colorado.edu>
> >
> > DI isn't necessary at the beginning of the interrupt
> > (interrupts already disabled), and RETI can be changed
> > to RET at the end.
>
>Is DI unnecesairy because the hardware-that-interrupts is
>disabled, or because when an interrupt occures the processor
>automaticaly disables it's interrupt-port (DI) and runs the
>code the IV table points to?
When an interrupt occures the processor automaticaly disables interrupts.
That's why you need 'ei' at the end of your interrupt routine.
>What is the "in/out (3)" stuff needed for, I wanted to write
>a 'wrapper' for the TIOS interrupt. I have now tried it
>together with the greyscale interrupt; like this here, but
>it makes the program drop back to the TIOS:
...
> in a,(3) ; check on interrupt status
> rra ;
> ld a,0 ;
> adc a,9 ;
> out (3),a ;
> ld a,$0B ;
> out (3),a ;
This part is necessary to *quit* an interrupt properly (at least on ti's
calcs). But now you continue...
> exx ; Swap to shadow registers.
> ex af,af ; So the TIOS swaps back to the
> rst $38 ; normal ones... (the ones we saved
> ex af,af ; with push/pops)
> exx ;
> pop bc ;
> pop de ;
> pop hl ;
> pop af ;
> ei ;
> ret ;
Because you call the standard interrupt handler, you don't need the *quit*
code (mentioned above), because the standard interrupt handler already
handles this.
>I suspect the "in/out (3)" to be the problem, what does
>it do? Does it enable the "hardware-that-interrupts"
>again? The TIOS is also fiddeling around with this port...
The only interrupts we have on ti's calcs are maskable interrupts. Port 3 is
the interrupt mask. It tells the interrupt handler what kind of interrupt we
have by setting some bits. As far as I could see only the first three bits
are used (the fourth tells the status of the [on] key). Wether or not these
bits are set affects what code is executed during the interrupt. What I
don't know is if these bits are set at regular times, randomly, or affected
by something else.
Tijl Coosemans
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