Re: A83: Disabling Interrupts

To: assembly-83@lists.ticalc.org
Subject: Re: A83: Disabling Interrupts
From: Jkhum98@aol.com
Date: Tue, 1 Feb 2000 17:44:25 EST
Reply-To: assembly-83@lists.ticalc.org

In a message dated 2/1/00 2:37:11 PM Central Standard Time, 
fhuang@annapolis.crosswinds.net writes:

> Doesn't the OS expect to have interrupts?  So once I go to IM 1, the OS puts
>  it at IM 2 and the interrupt (should?) appear again.

The OS's interrupt runs through IM1. A user interrupt can be activated using 
IM2. They can both occur if the programmer sets up a user interrupt and at 
the end of each interrupt jumps back to the OS's interrupt, somewhere early 
in mem, I forgot the address right now... The OS occaisionally disables 
interrupts for things like LCD writes, but it surely enables them again. On 
the 83 it seems that an IM2 interrupt can last until the programmer manually 
sets it back to IM1. On the 83+ however, it is not certain if the OS 
purposely sets IM1 to avoid user interrupts. It seems safe to envoke a user 
interrupt during your asm program, but a TSR interrupt may not be possible, I 
dont think anyone has tried yet... However I vaguely remember reading or 
hearing about how some romcalls on the 83+ that access the flash memory, 
specifically set to IM1, dont quote me on that though...

Jason_K